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dc.contributor.otherPreservation Department, Stony Brook University Libraries.en_US
dc.contributor.otherCataloging & Metadata Department, Stony Brook University Libraries.en_US
dc.identifier.urihttp://hdl.handle.net/1951/37360
dc.identifier.urihttp://hdl.handle.net/11401/65802
dc.descriptionleave(s) : ill; 28 cm.en_US
dc.formatMonograph.en_US
dc.format.extent1930906 bytes
dc.format.mediumElectronic Resource.en_US
dc.language.isoen_US
dc.rightsAll Rights Reserved. Stony Brook University.en_US
dc.typeTechnical Reporten_US
dcterms.creatorCharcranoon, Saravuten_US
dcterms.creatorRobertazzi, Thomas G.
dcterms.creatorLuryi, Serge
dcterms.dateAccepted2007-07-17T16:49:41Z
dcterms.dateAccepted2015-04-24T14:28:34Z
dcterms.dateSubmitted2007-07-17T16:49:41Z
dcterms.dateSubmitted2015-04-24T14:28:34Z
dcterms.formatapplication/pdf
dcterms.issued1998en_US
dcterms.provenanceMade available in DSpace on 2007-07-17T16:49:41Z (GMT). No. of bitstreams: 1 CEAS--757.pdf: 1930906 bytes, checksum: ad430f96d45eb783b569408141387b46 (MD5) Previous issue date: 1998en
dcterms.provenanceMade available in DSpace on 2015-04-24T14:28:34Z (GMT). No. of bitstreams: 3 CEAS--757.pdf.jpg: 969 bytes, checksum: de2eea2634259ee734b5eadafe4b7c81 (MD5) CEAS--757.pdf.txt: 102 bytes, checksum: f5968bdeab9cdcf264ec81f6a4eb5c3e (MD5) CEAS--757.pdf: 1930906 bytes, checksum: ad430f96d45eb783b569408141387b46 (MD5) Previous issue date: 1998en
dcterms.publisherStony Brook, N.Y.: State University of New York at Stony Brook, College of Engineering.en_US
dcterms.publisherStony Brook University.en_US
dcterms.titleCost efficient processor arrangement in single level tree networksen_US
dc.description.contributorThe content contained herein is maintained and curated by the Preservation Department.en_US
dc.description.contributorThis record is revised and maintained by the content administrators from the Cataloging & Metadata Department.en_US
dc.publisher.locationStony Brook, NY.en_US


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