| dc.identifier.uri | http://hdl.handle.net/11401/77225 | |
| dc.description.sponsorship | This work is sponsored by the Stony Brook University Graduate School in compliance with the requirements for completion of degree. | en_US |
| dc.format | Monograph | |
| dc.format.medium | Electronic Resource | en_US |
| dc.language.iso | en_US | |
| dc.publisher | The Graduate School, Stony Brook University: Stony Brook, NY. | |
| dc.type | Dissertation | |
| dcterms.abstract | Superconductor single flux quantum (SFQ) technology is one of the promising candidates for energy-efficient high-performance computing. A new generation of SFQ logics, Reciprocal Quantum Logic (RQL) with no static power dissipation in bias resistors, offers an opportunity to dramatically decrease energy consumption in superconductor processors. Although several low complexity RQL processing units have already been demonstrated, the use of RQL for local storage design has not been explored yet. The objective of this dissertation is to design on-chip local storage structures such as memory, register files, and caches with RQL technology and analyze their energy efficiency, complexity, and performance characteristics. The physical chip design of these RQL storage units is not feasible at this point because both CAD tools for physical VLSI chip design and as well as a target fabrication process are under development at Northrop-Grumman Systems Corp. (Baltimore, MD) and MIT Lincoln Laboratory, respectively. In order to achieve our goal, the layout-aware cell-level design process using VHDL RQL cell library developed at the Ultra High Speed Computing Lab in Stony Brook University has been used. The SBU VHDL RQL cell library specifies the dynamic and stand-by energy consumption, latency, JJ complexity, and approximate sizes of individual cells based on the input received from the JJ-level RQL designers. Clock propagation skew and wire delays are accounted for during circuit simulation. The circuit simulation is done with Mentor Graphics design and verification tools. As a result of the work, key characteristics of the 8.5 GHz multiported RQL storage structures with their capacity in the range of 1-4 kbit have been determined. The average energy consumption of the RQL storage designs is ~3.0-9.5 fJ/bit/operation at room temperature and the cryo-cooling efficiency is 0.1%. The data from this dissertation also reveal the critical issues that need to be considered in the RQL storage design. These will be helpful for further development on superconductor VLSI design. | |
| dcterms.available | 2017-09-20T16:52:14Z | |
| dcterms.contributor | Dorojevets, Mikhail | en_US |
| dcterms.contributor | Hong, Sangjin | en_US |
| dcterms.contributor | Salman, Emre | en_US |
| dcterms.contributor | Wong, Jennifer. | en_US |
| dcterms.creator | Chen, Zuoting | |
| dcterms.dateAccepted | 2017-09-20T16:52:14Z | |
| dcterms.dateSubmitted | 2017-09-20T16:52:14Z | |
| dcterms.description | Department of Computer Engineering. | en_US |
| dcterms.extent | 124 pg. | en_US |
| dcterms.format | Monograph | |
| dcterms.format | Application/PDF | en_US |
| dcterms.identifier | http://hdl.handle.net/11401/77225 | |
| dcterms.issued | 2015-05-01 | |
| dcterms.language | en_US | |
| dcterms.provenance | Made available in DSpace on 2017-09-20T16:52:14Z (GMT). No. of bitstreams: 1
Chen_grad.sunysb_0771E_12615.pdf: 6971369 bytes, checksum: c91a7d72cbd0327b62a8c766a2e09eec (MD5)
Previous issue date: 2015 | en |
| dcterms.publisher | The Graduate School, Stony Brook University: Stony Brook, NY. | |
| dcterms.subject | Computer engineering | |
| dcterms.title | Energy-Efficient Local Storage Design With Superconductor Reciprocal Quantum Logic | |
| dcterms.type | Dissertation | |
