| dc.identifier.uri | http://hdl.handle.net/11401/77267 | |
| dc.description.sponsorship | This work is sponsored by the Stony Brook University Graduate School in compliance with the requirements for completion of degree. | en_US |
| dc.format | Monograph | |
| dc.format.medium | Electronic Resource | en_US |
| dc.language.iso | en_US | |
| dc.publisher | The Graduate School, Stony Brook University: Stony Brook, NY. | |
| dc.type | Thesis | |
| dcterms.abstract | Deep convolutional neural networks (CNNs) are rapidly becoming the domi-nant approach to computer vision and a major component of many other pervasivemachine learning tasks, such as speech recognition, natural language processing,and fraud detection. As research and development of CNNs progresses, the size ofthe networks grows, leading to large increases in the computation and bandwidthrequired to evaluate these networks. Typical CNNs in use today already exceedthe capabilities of general-purpose CPUs, resulting in rapid adoption and activeresearch of CNN hardware accelerators such as GPUs, FPGAs, and ASICs. Inthis work, we develop a novel CNN accelerator architecture and design method-ology that breaks away from the commonly accepted practice of processing thenetworks layer by layer. By modifying the order in which the original input dataare brought on chip, changing it to a pyramid-shaped multi-layer sliding window,our architecture enables effective on-chip caching during CNN evaluation. Thecaching in turn reduces the off-chip memory bandwidth requirements, which is aprimary bottleneck in many CNN environments. | |
| dcterms.available | 2017-09-20T16:52:19Z | |
| dcterms.contributor | Ferdman, Michael | en_US |
| dcterms.contributor | Honarmand, Nima | en_US |
| dcterms.contributor | Samaras, Dimitris | en_US |
| dcterms.contributor | Berg, Alex. | en_US |
| dcterms.creator | Alwani, Manoj | |
| dcterms.dateAccepted | 2017-09-20T16:52:19Z | |
| dcterms.dateSubmitted | 2017-09-20T16:52:19Z | |
| dcterms.description | Department of Computer Science. | en_US |
| dcterms.extent | 54 pg. | en_US |
| dcterms.format | Monograph | |
| dcterms.format | Application/PDF | en_US |
| dcterms.identifier | http://hdl.handle.net/11401/77267 | |
| dcterms.issued | 2015-12-01 | |
| dcterms.language | en_US | |
| dcterms.provenance | Made available in DSpace on 2017-09-20T16:52:19Z (GMT). No. of bitstreams: 1
Alwani_grad.sunysb_0771M_12631.pdf: 777045 bytes, checksum: 666c7e7605c6fc0d8cee47b2ba640e3d (MD5)
Previous issue date: 1 | en |
| dcterms.publisher | The Graduate School, Stony Brook University: Stony Brook, NY. | |
| dcterms.subject | Computer science | |
| dcterms.subject | Convolutional Neural Network, Deep Learning, FPGA, High Level Synthesis | |
| dcterms.title | Fused Convolutional Neural Network Accelerators | |
| dcterms.type | Thesis | |
