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dc.identifier.urihttp://hdl.handle.net/11401/77494
dc.description.sponsorshipThis work is sponsored by the Stony Brook University Graduate School in compliance with the requirements for completion of degree.en_US
dc.formatMonograph
dc.format.mediumElectronic Resourceen_US
dc.language.isoen_US
dc.publisherThe Graduate School, Stony Brook University: Stony Brook, NY.
dc.typeThesis
dcterms.abstractAlthough finite impulse response (FIR) filtering is a well-known technique, it is still difficult to implement efficiently as hardware because the designer must choose from many application-specific design options, and it is difficult to choose those that best fit the requirements of the system. This thesis describes two design and simulation tools which enable easy implementation and optimization of time-domain FIR filters. The first generates hardware (as synthesizable Verilog) for a designer-specified FIR filter and the second provides a fixed-point simulation environment for the design space (using MATLAB). Both tools are customized based on the user's choices across a parameterized design space. In this thesis, we first design a flexible family of direct form time-domain FIR filters and optimize their adder structures. Then we introduce the accompanying flexible hardware generation tool which can produce synthesizable Verilog based on the user's specifications, and the MATLAB-based fixed-point simulator, which can verify the generator and evaluate the error of the fixed-point implementation. After creating these tools, we use them to carry out synthesis-based experiments to evaluate the tradeoffs among accuracy, area and speed of the time-domain FIR filter. We compare the results with a frequency-domain FIR filter.
dcterms.available2017-09-20T16:52:48Z
dcterms.contributorMilder, Peter A.en_US
dcterms.contributorHong, Sangjin.en_US
dcterms.creatorWu, Yujie
dcterms.dateAccepted2017-09-20T16:52:48Z
dcterms.dateSubmitted2017-09-20T16:52:48Z
dcterms.descriptionDepartment of Electrical Engineering.en_US
dcterms.extent69 pg.en_US
dcterms.formatApplication/PDFen_US
dcterms.formatMonograph
dcterms.identifierhttp://hdl.handle.net/11401/77494
dcterms.issued2013-12-01
dcterms.languageen_US
dcterms.provenanceMade available in DSpace on 2017-09-20T16:52:48Z (GMT). No. of bitstreams: 1 Wu_grad.sunysb_0771M_11696.pdf: 2587975 bytes, checksum: b5634805a907e7d8745d0c7625cd7d6e (MD5) Previous issue date: 1en
dcterms.publisherThe Graduate School, Stony Brook University: Stony Brook, NY.
dcterms.subjectElectrical engineering
dcterms.titleGeneration of Customized Time Domain FIR Filter Hardware
dcterms.typeThesis


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