| dcterms.abstract | In physics research, an accelerator is a large machine able to bring particles like electrons and protons to a very high speed, as close as the speed of light. Some accelerators, such as the Large Hadron Collider (LHC) at CERN are designed to make the particles collide to generate and possibly discover new particles. Other accelerators, such as the one at the National Synchrotron Light Source II (NSLS II) in Brookhaven National Laboratory (BNL) are designed to generate, from the accelerated particles, high energy photons like X-ray, which are then used as a characterization tool in science research. Information, such as position and energy of the particles, or intensity and profile of the X-ray beam, is crucial to either reconstruct the particle trajectory to infer the collision process or to characterize and use the tool itself. Detection systems are designed to detect and collect information, such as energy, timing, and position of these high-energy particles or photons. Such a detection system consists of sensors and front-end circuits. Sensors interact with particles of interest and generate electrical signals such as currents or charges. Front-end circuits interface directly with sensors and read out its signals. Signals are typically amplified, shaped (or filtered), and digitized through several signal processing stages. In this thesis, I will introduce two detection systems, and will focus on the design and characterization of the front-end circuits. The first system is an X-ray beam monitor. It is designed to measure the position, intensity and profile of the X-ray beam at NSLS II. The sensor is built with diamond and it is segmented in 32x32 effective elements (pixels). The 32-channel bias voltage switching circuit and the 32-channel readout circuit are designed with discrete devices, and provide bias voltage switching and readout of current signals generated in diamond elements. A control and data processing subsystem is implemented on a Xilinx System-on-Chip (SoC) with a dual-core ARM processor and an FPGA. The system is now in operation at the XFP beamline of the NSLS II. The second system is a particle detector for the LHC. I will briefly talk about the sensors and then introduce an advanced low-noise mixed-signal front-end Application-Specific Integrated Circuit (ASIC) called VMM currently being finalized for production. | |
